During the fetch stage intitially the address of the next instruction from the program counter(PC) is loaded into the memory address register(MAR). This address is then sent via the address bus to main memory where the instruction is then retrieved from memory and sent back to the cpu via the data bus. It is then loaded into the memory buffer register (MBR) before the instruction is loaded into the Current Instruction Register(CIR). Simultaneously the PC is incremented so that it holds the address of the next instruction. The instruction in the CIR is decoded and extra data is fetched if necessary. Finally the instruction is executed using the Arithmetic Logic Unit (ALU) if necessary and store the result inside a register